MediaTek Rolls Out Flagship Chip Using TSMC’s 2nm Process, Volume Production Slated for Late 2026

MediaTek and TSMC have taped out a flagship system-on-chip (SoC) using TSMC’s enhanced N2P process, an early commercial step in the chipmaker’s 2-nanometre family that adopts a nanosheet transistor architecture.

MediaTek said the design targets mobile, compute, automotive and data-centre applications, and the companies expect volume production of the chipset in late 2026. The tape-out places MediaTek among the first partners to complete a design on TSMC’s N2P node and positions the chip at the flagship end of MediaTek’s product lineup.

N2P Node

TSMC says N2P delivers material efficiency gains compared with its N3E node, offering up to roughly 18% higher performance at the same power, about 36% lower power at the same speed, and roughly 1.2× logic density.

Those metrics are central to the pitch for N2P: better performance per watt and increased density that let designers either boost sustained throughput or fit more functions, larger neural accelerators or additional IP blocks into the same silicon area.

The move to N2P matters because it gives MediaTek a path to higher sustained performance and improved energy efficiency, attributes that are especially important for power-hungry on-device AI workloads, battery life in flagship smartphones, and thermal or space-constrained environments such as automotive systems and edge servers.

Higher logic density also enables more complex feature sets without increasing die size, which can be a competitive advantage for devices that need both performance and power efficiency.

MediaTek-TSMC Partnership

MediaTek framed the tape-out as evidence of its ongoing engineering collaboration with TSMC to push advanced process technology across a wide range of applications, from edge devices to the cloud.

TSMC described N2P as a significant evolution in the nanosheet era, tuned to deliver improved, energy-efficient computing for demanding customers, language that underscores the foundry’s focus on performance per watt as process nodes advance.

Technically, N2P represents the next step beyond TSMC’s N3E (3nm enhanced) family by introducing nanosheet transistors and additional process optimizations that prioritize performance per watt and density. For silicon vendors, early access to such nodes can translate into a product-level advantage for flagship devices or for chips that integrate on-device AI accelerators and specialized compute blocks.

Future Moves

The key things to watch going forward are how MediaTek positions the new SoC across its product lines, whether focused primarily on smartphones, AI PCs, automotive ADAS, or edge servers, and the actual power and performance benchmarks once prototype silicon reaches partners and reviewers.

Equally important will be TSMC’s production ramp and yield performance as N2P scales toward commercial volumes in 2026.

The company is a major fabless semiconductor designer whose SoCs power smartphones and a broad range of connected devices. MediaTek highlights exposure across mobile, smart home, AI PCs, automotive and data-centre markets, and this tape-out signals its intent to remain competitive at the flagship and AI-capable ends of the market.